High-k materials such as HfO2-based dielectrics have successfully replaced SiO2 in the state of the art complementary metal-oxide-semiconductor (CMOS) technology. In order to further scale the HfO2-based gate dielectric, one approach to scale the equivalent oxide thickness (EOT) is to reduce the overall dielectric thickness including the thickness of a SiO2 interface layer. Using a zero thickness interface layer by depositing a high-k material directly onto a Si substrate suffers from nucleation problems and long incubation time during the initial deposition of the high-k material. The nucleation problems result in poor material and electrical properties of the high-k material which leads to degradation of the device performance. In one example, atomic layer deposition (ALD) of a high-k material on a hydrogen-terminated Si surface can lead to island-like growth of a discontinuous high-k film.
These and other problems that are encountered in scaling of advanced CMOS technology need to be solved in order to further integrate the use of high-k materials into semiconductor devices.